Over the weekend, CoinDesk caught up with Spondoolies-Tech CEO Guy Corem to discuss development of the firm’s third- and fourth-generation ASIC bitcoin mining chips.
Last month the Israel-based bitcoin ASIC designer announced two upcoming chip designs and the raising of $5m as part of its ongoing Series B funding round.
Corem honed his skills working as a software and firmware engineer at Intel. Notably, the Spondoolies-Tech headquarters is located just a couple of minutes away from Intel’s 22nm foundry in Kiryat Gat.
The CEO was keen to talk about the company’s ASIC roadmap for 2015 and elaborate on his company’s plans for the imminent transition to FinFET transistors.
Spondoolies-Tech is currently working on two separate designs: a 28nm ASIC set to launch in early 2015, followed by fourth-generation chips manufactured using an unspecified FinFET node.
Most cryptocurrency ASIC companies do not disclose their manufacturing partners and Spondoolies is no exception. Instead of describing the new chip as a 14nm or 16nm design, which would more or less identify the foundry, Corem prefers to use “advanced process” FinFET terminology.
Skipping the 20nm node
Corem indicated that Spondoolies has made a conscious decision to skip the 20nm node altogether.
The 20nm process, currently offered by the Taiwan Semiconductor Manufacturing Company (TSMC) and Samsung, is seen as an intermediate process on the way to 14nm/16nm FinFET nodes.
The 20nm node offers much higher gate density relative to 28nm nodes and, unlike FinFET processes, is already available for high volume production. The 20nm LP node is currently used on Apple A8 chips, the latest Samsung Exynos series System-on-Chip designs and Qualcomm’s upcoming Snapdragon 810 processor, which will power most flagship phones next year.
However, while the 20nm process offers significant leakage reduction relative to 28nm nodes, theoretical speed is compromised by the use of very small planar transistors.
As a result, many companies are skipping the 20nm node for high-performance chips, such as flagship GPUs; leaving the 20nm node for use in power-efficient mobile application processors and modems, not high performance ‘big core’ chips.
Spondoolies-Tech has decided to stick with the mature 28nm node for its third-generation ASIC, despite the fact that the company’s first FinFET chip will ship a couple of months after rivals will have launched their 16nm FinFET ASICs.
“We have our own third-generation design, still 28nm, which will be comparable to their 16nm designs,” said Corem.
He added that the third generation is set to launch in late Q1, or at the beginning of Q2, next year. This points to a March/April timeframe.
The use of a mature node offers a number of advantages, Corem explained. Sixteen-nanometre wafers are twice as expensive as 28nm versions, production is much slower due to limited capacity and mature processes offer better yields in general.
While FinFET nodes offer significant performance improvements, mature nodes still make sense from a financial perspective.
“The two most important factors in this industry are: GH/s/mm2 – it’s a $/GH/s measurement – die density in terms of GH/s, which is a measure of the Capex needed, and of course J/GH (W/GH/s), which is a measure of the Opex needed. A third, often overlooked parameter is the wafer percentage of the total miner BOM (bill of material).”
Corem pointed out that Spondoolies-Tech is also looking into different ways of keeping deployment and operating costs low.
He outlined two concepts that should be implemented next year:
“Our next miner form factor allows replaceable hashing boards. On top of that, we are experimenting with innovative low-cost development methods.”
The modular approach will allow customers to re-use the entire platform apart from the hashing boards, thus reducing upgrade costs.
Spondoolies-Tech’s next-generation platform will not be suitable for home mining, however, as it will feature 10 hashing boards, each with its own PSU.
At the same time, Spondoolies-Tech hopes to support network decentralisation by adding so-called ‘smart property’ ASICs to its portfolio. These products should appear in the second half of 2015, but information is limited.
‘Blockchain lottery’ device
The company is also involved in the development of another unconventional product, described as a ‘blockchain lottery’ device.
The Technobit Dice is a small 150 GH/s desktop USB miner based on Spondoolies’ old RockerBox ASIC. While not a competitive chip at the current difficulty level, the €78 device is designed to help decentralise the network and put some hashing power back in the hands of individuals rather than industrial-scale miners.
The Dice can be used as an entry-level miner, but that’s not what it’s all about. Installing custom software allows the Dice to act as a blockchain lottery device, giving the user a 150/300,000,000 chance to win 25 BTC every 10 minutes.
It uses a standard ATX PSU or 10A brick PSU, provided by the user, and offers a power efficiency at 150 GH/s of 0.7W per GH/s. While the Dice does not offer breathtaking performance, it offers an incentive for enthusiasts to get back into the mining game without having to invest thousands of dollars in cutting-edge hardware.
For more on the available 14nm and 16nm FinFET manufacturing options, see CoinDesk’s coverage of KnCMiner’s Solar announcement.
Wafer image via Shutterstock
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